Before the topic of simulation speed, a minor check to be performed on components that have polarity like voltage sources, ammeters and voltmeters.
Until now, the only check on the polarity of these elements is that it is within the physical circuit map. But now that branches have been defined, another check can be enforced about whether the polarity element is in the same branch as the component. This is the code (click on "view raw" below the box to see the code in a new window):
For this to happen, the main program "circuit_solver.py" has been rearranged a bit. No changes to the code as such. Just that the network interpreter is called immediately after the circuit layout file is interpreted and checked for basic errors like componenents not found in library or duplicate components. The idea is that polarity errors should be picked up at the design stage before the simulation starts.
Now the other change of simulation speed. My concept has been similar to an interrupt driver program. Instead of an interrupt vector, generate an "event vector". This event vector will be "yes" corresponding to a branch is an element has changed in the branch. Otherwise, it will remain "no". If there is a single "yes", this would mean the all the system matrices A, B and E would be calculated completely. Currently, this might be necessary. At a later stage, I could think of ways to recalculate only the parts that are affected.
So, the branch_events vector is reset to "no" at the end of the code block. This vector is initialized to "yes" at the beginning to ensure that at least one computation takes place. With passive circuits, there won't be any event generation and therefore, there will be no recalculation.
This has speeded up the execution quite a bit but still not as much as I would have liked. Need to figure which of the code blocks can be done away with. A fairly simple circuit like "testckt7.csv" in the example list which results in a 4x4 system takes around 2 minutes to solve for a run time of 0.5s and a time step of 10 microseconds. Which is quite slow. At later stages, this might be a problem when simulating an inverter with a time step of 1 microsecond. If the inverter has a switching frequency of 5 kHz, an event would be generated around every 30 microseconds. No idea how it is going to be.
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