Saturday, December 19, 2015

Excessive loops

I started working on the case of a three-phase inverter feeding an inductor-capacitor filter with the objective for designing a controller to regulate the voltage across the capacitor. In a nutshell simulate a UPS.

I ran into a number of problems which will be separate posts. I am still not sure if these problems have been completely solved.

The first problem. On simulating in open loop i.e giving balanced sine wave modulating signals I expected smooth balanced current and voltage waveforms. Instead all were badly distorted. The reason was that the circuit has 48 branches and 32 nodes but the number of loops calculated was 20. This isn't so bad because the loop finder works in random ways and could end up with extra loops. The assumption was that these extra loops would be linear combinations of the other loops and would be eliminated by loop manipulations. However, on looking at the system matrices in the differential equations I found 18 loops. So one loop was extra and solving this loop messed up the simulation.

So why did this loop linger? The loop manipulations are done only for stiff loops. This is to restrict stiff branches to the minimum number of loops. But if there are excess loops that are nonstiff to begin with, they may never be eliminated. So, to make sure that the loops are exact, on forming the system loops for the first time, row operations are performed to convert them to an upper triangular form. This will ensure that loops that are linear combinations are eliminated at the beginning of the simulation.

Here's the code:

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