Thursday, February 21, 2013

Circuit Solver - III

With the SourceForge (SF from now on) project up and going, I will dedicate this blog to description rather than posting code.

One major issue. Choosing the simulation time step. The simulation time step can be chosen larger for speed but choosing a time step too large will result in instability. The concept is as follows.

Each loop has a time constant that is set by the ratio of total inductance to total resistance (L/R) in the loop. In order to simulate the system accurately, you need to choose a time step that is smaller than the smaller L/R ratio in the system. This has the potential of creating a few problems because if you choose a small parasitic inductance in series and a large resistance in parallel, a loop containing these will have a ridiculously low time constants that will need a simulation time step of nanoseconds.

So this means, maybe I need to choose the loops with the largest inductances instead. Or inform the user that the lowest time constant is "x" and a decent value of simulation time step is "y".

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